Principal Engineer, CAD

Description

The company is a precision timing business building MEMS-based timing devices, which it says are more accurate, smaller and more resilient than quartz. Its parts are used in more than 400 applications, including AI datacenters, automated driving, industrial and humanoid robots, wearables and IoT, and it has shipped over 4 billion devices.

This principal role supports CAD software for digital, analog and mixed-signal chip design, covering Cadence, Synopsys, Siemens, Keysight and third-party tools. You will also work with EDA vendors and test new software releases across several engineering sites before they reach IC designers.

Responsibilities

• Manage the full lifecycle of custom CAD flows, from tool development and installation to configuration, maintenance and upgrades on Cadence, Synopsys, Siemens and Keysight platforms.
• Own PDK installation, validation, customization, maintenance and release management, keeping versions aligned with the foundry and ready for use.
• Run and maintain end-to-end tapeout flows, submitting tapeouts to foundries while meeting their requirements, schedules and quality standards.
• Support schematic capture, analog and mixed-signal simulation, and layout and layout verification workflows that follow revision-controlled processes.
• Support and maintain digital simulation and verification environments and digital place-and-route tools.
• Build and maintain CAD utilities, automation scripts and regression flows that make design work faster and more consistent.
• Evaluate new tools for function and performance, and deploy them.
• Give CAD software and Linux support to CMOS design engineers and IC layout designers.
• Write and maintain user documentation, best practices and training material for design teams across sites.
• Diagnose and resolve reported problems promptly, and check for regressions.
• Work directly with EDA vendor application and support teams to fix issues and shape product improvements.
• Take on other CAD-related initiatives and projects as assigned.

Requirements

• A BA or BS in electrical engineering, computer science or a related field.
• At least 7 years of experience supporting EDA tools for analog and digital new product development of CMOS ICs.
• Hands-on experience with Cadence Virtuoso Schematic Editor and Layout Suite, Spectre, Spectre-RF, Multi-Mode Simulator, Physical Layout tools, Assura, PVS, Pegasus, Innovus and Tempus.
• Hands-on experience with Siemens Analog FastSPICE, Questa, Calibre PVS and XRC, and with Synopsys Design Compiler, VCS, SpyGlass and other tools.
• Programming skills in DFII SKILL, Perl, MATLAB, Tcl/Tk, C, C++ and Python.
• Proficiency in Linux, its utilities and scripting.
• Excellent written and verbal communication skills.
• Comfort working with others in a collaborative team that moves quickly.
• Strong problem-solving skills, attention to detail and a proactive approach to improving how things are done.

Conditions

Pay is set by location, experience, education and training. The stated range is $148,320 - $203,940 USD.

The role is eligible for a quarterly bonus linked to innovation goals, in addition to base salary.

The company offers equity grants.

The company's equal opportunity commitment applies to all candidates.

Benefits

• 401k plan.
• Health and wellness coverage including medical, dental, vision and life insurance.
• Parental leave, legal services and time-off plans.