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NXP Semiconductors

Edge & Physical AI HW Product Manager/Director

  • Office
  • 6+ years

Salary

Not stated

Similar roles pay $175K - 235K a year · our estimate

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Description

The role owns the hardware product roadmap for the company's NPU portfolio, which covers discrete NPUs in the Ara series, NPU IP integrated into i.MX processors, and chiplet-based designs that scale out.

The work moves from product definition through ramp, sustaining and end of life, and the role shapes each product's specifications, business case and go-to-market plan.

The role works with silicon architects, engineering leads and the software product manager, and represents the NPU hardware line to executives, customers, partners and at industry events.

Responsibilities

  • Set and keep up the multi-generation hardware roadmap for discrete NPUs, NPU IP inside i.MX processors, and chiplet-based scale-out architectures.
  • Turn customer needs and competitor data into silicon specifications covering TOPS, TOPS/W, TOPS/sq.mm, memory architecture, power, I/O, packaging, safety and process node.
  • Lead architecture reviews, design partitioning and feature tradeoffs with silicon architects and engineering leads.
  • Build the business case for each hardware product, covering BOM cost, ASP, gross margin targets, volume forecasts and NPV, and present investment recommendations to executive leadership.
  • Lead make, buy or license assessments for new capabilities, including MAC array designs such as in-memory compute, non-uniform memory subsystems, memory architectures and interconnect IP such as UCIe.
  • Define the chiplet strategy for scale-out NPU configurations, including die partitioning, die-to-die interface choice and multi-chip package requirements for larger model inference.
  • Define NPU IP integration requirements with the i.MX, S32 SoC, i.MCU and RT product teams, covering power domains, bus interfaces, memory bandwidth allocation, hardware-software co-design limits, SoC bring-up and debugging.
  • Run early access and customer sampling programs, collect validated requirements from lead customers, and feed them into architecture decisions before freeze.
  • Own the competitive benchmarking framework covering NPU silicon from Qualcomm, Nvidia, RockChip, Hailo, Axelera, Ambarella and others, and set the differentiation strategy on form factor, performance, power, cost, safety, support and software ecosystem.
  • Manage customer transition plans across product generations through the full lifecycle.
  • Co-own software development for discrete, integrated and chiplet-based designs with the software product manager.
  • Build end-to-end system solutions and demonstration platforms for hardware and software developers, including at industry events and conferences.

Requirements

  • 10+ years of product management or product strategy experience in semiconductors or silicon IP, with direct ownership of hardware product definition and roadmap.
  • Hands-on experience writing silicon product specifications, including performance targets, memory architecture, power envelopes, packaging and process node decisions.
  • Solid understanding of SoC and IP integration. Experience defining IP for integration into a host processor or SoC is strongly preferred.
  • Familiarity with chiplet architectures and multi-chip interconnect standards such as UCIe or BoW, or equivalent. This is a significant plus.
  • A record of winning designs and driving customer adoption across several product generations.
  • Ability to build and defend business cases covering BOM cost, ASP, gross margin and market sizing.
  • Experience with competitive analysis and differentiation strategy in a fast-moving semiconductor segment.
  • Strong cross-functional leadership, able to align architecture, engineering, sales, marketing and executives.
  • Clear written and verbal communication, including explaining complex technical tradeoffs to engineers and executives.
  • Good to have: direct experience in AI or ML inference silicon, such as NPU, GPU or inference accelerator product management.
  • Good to have: familiarity with edge inference workloads, including CNNs, transformers, LLMs and VLM variants.
  • Good to have: experience working with ODMs, OEMs and contract manufacturers on board design, system integration and production.
  • Good to have: background in industrial, automotive or embedded edge markets.
  • Good to have: an MBA or advanced degree in electrical engineering, computer engineering or a related field.

Conditions

Location details refer to the United States.

The company is an equal opportunity and affirmative action employer and provides reasonable accommodations for qualified disabled individuals.

Where you’d work

From the office

About the company

NXP Semiconductors

Offices in San Diego, United States, Austin, United States, San Jose, United States, United States

Also hiring in Austria, Bucharest, Romania, Romania and 14 more places

2 of their 59 open roles are remote

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Details11 facts · Role, Location, Compensation, Employment
Tech stack
  • LLMs
Seniority
Director
Type
Full-time
Specialty
Product Manager
Region
United States
Pay period
Annual
Show 5 more factsShow less

Role

Category
Product & Project
Specialty
Product Manager
Seniority
Director
Experience
10+ years
Tech stack
  • LLMs

Location

Work model
Office
Region
United States
Offices
  • San Diego, United States
  • Austin, United States
  • San Jose, United States
  • United States

Compensation

Salary
Salary by agreement
Pay period
Annual

Employment

Type
Full-time

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