ATE Test Development Engineer

Description

The company builds AI computing platforms that span software models, compilers, hardware platforms, networking and semiconductors. Its team has designed a high-performance RISC-V CPU from scratch and is growing across all experience levels.

The role is an ATE test development position focused on building scalable test solutions for the Advantest V93000 platform using SmartTest 8, custom code and low-level tester APIs. It suits someone who likes writing clean, modular software that interacts directly with hardware, understands how measurements should behave, and can run experiments that separate variables across silicon, instrumentation and test method.

You will learn how to build scalable production test solutions for high-performance AI and compute silicon, and how test method, instrument behavior, silicon performance and manufacturing requirements connect. You will also work on silicon characterization, Vmin/Fmax extraction, guard-band definition, yield learning and automated failure triage, and see how test content moves from NPI bring-up to production release and high-volume manufacturing.

The company assesses candidates for the level that fits them best during interviews, and offers match that level, which may differ from the level in this posting.

Responsibilities

• Own the development, debugging, datalogging and optimization of ATE test content for both NPI and production.
• Build and maintain modular test programs and measurement libraries for the Advantest V93000.
• Implement and tune parametric, functional, scan, BIST and system-level test flows using tester APIs and custom measurement sequences.
• Debug ATE failures and support product engineering with characterization, Vmin/Fmax extraction, guard-band setting, production limits, and correlation with bench, SLT and validation results.
• Create reliable datalogging and automation, and improve test time, multisite efficiency, measurement stability, yield analysis and regression testing.
• Make sure devices are thoroughly characterized, tested efficiently and ready for high-volume manufacturing.

Requirements

• You have more than 10 years of experience in ATE test development, semiconductor test engineering or post-silicon validation.
• You are proficient with the Advantest V93000, SmartTest 8, tester APIs, C++ or Java, and Python automation.
• You understand ATE instrumentation, including DPS, PMU, RF/HSIO, timing sets, multisite execution and tester-to-DUT behavior.
• You solve problems in a structured way, with experience in controlled experiments, root-cause isolation, cross-domain debugging and semiconductor test methods.

Conditions

The role is hybrid and based in Austin, TX; Santa Clara, CA; or Fort Collins, CO.

Pay for all engineers ranges from $100k to $500k, covering base salary and variable compensation targets. Experience, skills, education, background and location all affect the actual offer.

The offer is contingent on your eligibility to access U.S. export-controlled technology under the EAR, including the rules for transfers to nationals of certain countries (such as EAR Country Groups D:1, E1 and E2), which apply both inside and outside the U.S. Depending on your citizenship or permanent residency status, or on whether a license from the U.S. Commerce Department or another federal agency can be obtained, the offer may be conditional. If employment is not possible under these laws, the offer will be withdrawn.

The company is an equal opportunity employer.

Benefits

• A competitive compensation package and benefits.