Test Engineer, System-Level Test (SLT)

Description

The company builds AI hardware and software across models, compilers, platforms, networking and silicon, and its team has built a high-performance RISC-V CPU from scratch.

The team is growing and hiring at every seniority level.

This role ensures the chips behave reliably under real workloads in real systems. You will build the software and system infrastructure that lets validation tests run dependably in manufacturing, and use structured debugging to tell hardware faults apart from software, interface and environmental causes. It suits someone who knows how tests are built and how silicon reacts under stress, and who can turn that into scalable, production-ready tools.

You will learn to design SLT software that links validation content to high-volume manufacturing, build debugging skills across silicon, boards, firmware, operating systems, drivers and test content, and see how architecture choices affect quality, time to yield and ramp speed, with impact expected from the start.

Candidates are assessed for the right level during interviews, and the offer level may differ from the level in this posting.

Responsibilities

• Create the software that schedules validation-provided tests on SLT setups shipping to OSAT production.
• Write wrappers, harnesses and abstraction layers that run validation content unchanged, with deterministic runs, dependency handling, configuration control and structured error handling.
• Bring functional, stress and diagnostic tests onto SLT platforms and adapt them for high-volume manufacturing, keeping execution stable and pass/fail criteria clear.
• Build logging, telemetry, failure signatures and automated triage, and route cross-domain issues to the teams that can fix them.
• Define data standards for yield analysis and RMA investigations.

Requirements

• You have 10+ years in system-level test, embedded systems, software architecture or hardware/software integration, and strong C/C++, Python or similar language skills.
• You use object-oriented design to build modular, maintainable and extensible test frameworks, including execution wrappers, harnesses and abstraction layers.
• You can control test equipment and automate handlers or external instruments over standard communication protocols, and debug across test hardware, Linux hosts, firmware, drivers and operating systems.
• You work effectively with validation, firmware, silicon debug, product engineering, manufacturing and OSAT/fab teams.
• A plus, not required: JTAG, boundary scan, DFT, high-volume manufacturing, NPI, Git or CI/CD experience.

Conditions

The role is hybrid, based in Austin, TX; Santa Clara, CA; or Fort Collins, CO.

Compensation for engineers ranges from $100k to $500k, including base pay and variable compensation targets, and the actual offer depends on experience, skills, education, background and location.

The offer may depend on your eligibility to access U.S. export-controlled technology under the EAR, including for nationals of certain countries (such as EAR Country Groups D:1, E1 and E2), which may turn on citizenship, permanent residency or a license from the Commerce Department or another federal agency, and the offer will be rescinded if employment is not possible under these laws.

The company is an equal opportunity employer.

Benefits

• A compensation package and benefits are offered.