Sr Engineer, TSE-DRAM

Description

The company designs memory and storage products.

This senior engineering role sits in test engineering for DRAM, working on test software, test hardware and production test flows.

Responsibilities

• Write, debug and maintain code that lets advanced memory devices be tested in parallel.
• Support R&D by working with teams around the world, including on the design and debugging of test hardware.
• Build efficient new production test flows by refining test algorithms.
• Create test plans for new DRAM tests and algorithms, covering test software and hardware needs, defect coverage, characterisation, trend tracking, process flow and test time.
• Write test programs mainly in C++ and Python for ATE, then release them to manufacturing.
• Cut product test time and manufacturing cost by making test programs more efficient.
• Know the device well enough to test it properly.
• Automate test work with software to save effort.
• Build tools that make sense of terabytes of probe data.
• Develop new DFT, DFM and DFR capabilities.
• Debug test issues on your own, find root causes and deliver fixes across internal and external groups.
• Use statistical analysis to justify program validation and release, protecting program quality and data integrity.
• Verify yield and quality with global teams so that only top-quality product meeting datasheet specifications ships to customers.
• Help internal and external groups run yield or capacity experiments by solving test issues quickly.
• Support cross-department and multi-site teams building new processes for the product roadmap, leading and driving work when needed.
• Communicate clearly with internal and external customers to build and qualify new test solutions on time.
• Make good use of existing resources, acting as a liaison and coach.
• Share technical findings with varied audiences, presenting formally where needed to area, department, site or industry groups.

Requirements

• A bachelor-level degree in electrical, electronics or computer engineering, computer science, mechanical engineering or a related field, plus 4 years of experience in this role or a related occupation.
• Understanding of digital logic gates, CMOS transistor operation and DRAM device physics as they apply to test and reliability.
• C++ programming skills to develop and debug test algorithms.
• Comfort with Unix/Linux environments and command line tools for test program development.
• Python or Perl scripting for test automation and data extraction.
• Data analysis, Statistical Process Control (SPC) and statistical modelling to draw useful conclusions from large, complex datasets.
• Knowledge of CMOS manufacturing.
• Experience with semiconductor memory testers (ATE platforms) and algorithm pattern generation (APG).

Conditions

Information on your right to work is linked from the listing.

The company prohibits child labour, follows applicable labour laws and standards, and charges candidates no recruitment fees.

Benefits

• A choice of medical, dental and vision plans, available in all locations.
• Income protection if illness or injury stops you from working.
• Paid family leave.
• Paid time off and paid holidays.
• The company publishes a benefits guide with full details of its programs.