Principal Engineer, CAD

Description

The company builds MEMS-based precision timing products, which are more accurate, smaller and more resilient than quartz. Its devices are used in more than 400 applications, including AI datacenters, automated driving, industrial and humanoid robots, wearables and IoT, and it has shipped over 4 billion units.

This Principal Engineer role supports CAD software for digital, analog and mixed-signal chip design. The tools come from Cadence, Synopsys, Siemens, Keysight and third-party vendors.

You will support IC designers across several engineering sites, work with EDA vendors, and test and validate new software releases before they are rolled out to the design teams.

Responsibilities

• Manage the full lifecycle of custom CAD flows across Cadence, Synopsys, Siemens and Keysight platforms, covering tool development, installation, configuration, maintenance and upgrades.
• Install, validate, customize and maintain PDKs and their releases, keeping them aligned with the foundry and current versions ready to use.
• Run and support end-to-end tapeout flows, submitting designs to foundries in line with their requirements, schedules and quality standards.
• Support schematic capture, analog and mixed-signal simulation, and layout and layout verification workflows, using revision-controlled processes.
• Support digital simulation and verification environments, along with digital place-and-route tools.
• Build and maintain CAD utilities, automation scripts and regression flows that make design work faster and more consistent.
• Evaluate new tools for function and performance, and deploy the ones that pass.
• Give CAD software and Linux support to CMOS design engineers and IC layout designers.
• Write and maintain user documentation, best practices and training material for design teams across sites.
• Diagnose and fix reported problems promptly, and run regression checks on the fixes.
• Work directly with EDA vendors' application and support teams to resolve issues and push for product improvements.
• Take on other CAD initiatives and projects as they are assigned.

Requirements

• Bachelor's degree (BA/BS) in electrical engineering, computer science or a related field.
• At least 7 years of experience supporting EDA tools for CMOS IC CAD in analog and digital new product development.
• Must have experience supporting the following:
• Cadence Virtuoso Schematic Editor and Layout Suite, Spectre, Spectre-RF, Multi-Mode Simulator, Physical Layout tools, Assura, PVS, Pegasus, Innovus and Tempus.
• Siemens Analog FastSPICE, Questa, Calibre PVS and XRC.
• Synopsys Design Compiler, VCS, SpyGlass and other tools.
• Programming in DFII SKILL, Perl, MATLAB, Tcl/Tk, C/C++ and Python.
• Solid Linux OS skills, including utilities and scripting.
• Desired: strong written and verbal communication.
• Desired: ability to work well with others in a fast-paced collaborative team.
• Desired: strong problem-solving, attention to detail and a proactive approach to continuous improvement.

Conditions

Pay is competitive and is set by location, experience, education and training.

Base salary range is $160,920 to $230,140 CAD.

Benefits

• Eligible for a quarterly bonus tied to reaching innovation goals.
• Eligible for equity grants, giving a share in the company's future growth and success.
• 401k plan.
• Health and wellness coverage, including medical, dental, vision and life insurance.
• Parental leave, legal services and time-off plans.