Principal EDA Engineer

Description

The company needs a principal engineer to lead technical work on its global engineering compute and design-data-management environment.

The role blends hands-on CAD engineering with ownership of compute infrastructure, Perforce/IPLM design data management, project and workspace methods, automation, documentation, training and engineering support.

You will work with engineering, CAD and infrastructure teams to build scalable ways to manage semiconductor design environments and design data for engineering teams spread across the world.

Responsibilities

• Lead the technical side of engineering compute infrastructure and CAD environments.
• Help develop and evolve Linux-based engineering environments that stay consistent across sites.
• Set requirements for compute, storage and related engineering infrastructure.
• Work with IT/IS and engineering teams so the infrastructure meets semiconductor design needs.
• Support the migration and consolidation of legacy engineering environments.
• Troubleshoot complex infrastructure and engineering environment problems.
• Own the technical side of Perforce Helix and IPLM design-data-management methods and provide expertise on them.
• Support integration of Perforce/IPLM with EDA tools and engineering environments.
• Build methods for IP creation, versioning, release, reuse and lifecycle management.
• Create scalable approaches for managing analog and digital design data.
• Define data-management best practices and help projects adopt them.
• Build standard project and workspace environments and support them.
• Support project setup, EDA tool configuration, environment variables and Cadence setup.
• Create reusable methods for project creation and onboarding.
• Keep projects consistent while still allowing project-specific configuration.
• Build automation for engineering environment and data-management workflows.
• Create and maintain Python and shell utilities.
• Cut manual project setup and administration through automation.
• Make CAD infrastructure processes more reliable, maintainable and scalable.
• Develop methods for migrating engineering data from legacy infrastructure.
• Help teams move from existing data-management platforms to strategic Perforce/IPLM-based solutions.
• Help engineering teams move projects, design data and methods between environments.
• Keep legacy environments adequately supported during the transition.
• Write and maintain technical documentation, user guides and engineering best practices.
• Create and deliver training on engineering compute and design-data-management environments.
• Support onboarding of projects and engineering teams.
• Provide expert escalation support for complex CAD and data-management issues.
• Turn specialist knowledge into documentation and repeatable processes that can be maintained.
• Shape the roadmap for engineering compute and design-data-management infrastructure.
• Evaluate new technologies and methods for engineering data management.
• Work across CAD, engineering and IS organizations to set clear, sustainable ownership boundaries.
• Move engineering environments toward standardized, scalable and globally supportable solutions.

Requirements

• Significant experience in EDA/CAD engineering, semiconductor design infrastructure or engineering compute environments.
• Strong Linux/Unix skills.
• Strong understanding of engineering compute, storage and data-management environments.
• Experience with Perforce Helix (P4) or comparable enterprise version-control or data-management technology.
• Experience with Methodics IPLM or equivalent IP lifecycle-management tools.
• Experience with semiconductor EDA workflows.
• Strong Python and/or shell scripting skills.
• Experience supporting complex engineering project environments.
• Excellent troubleshooting and root-cause analysis skills.
• Ability to work effectively across engineering and IT/infrastructure organizations.
• Strong documentation and technical communication skills.
• Highly desirable: Perforce administration and architecture experience.
• Highly desirable: Cadence/Virtuoso knowledge.
• Highly desirable: Understanding of analog and digital semiconductor development flows.
• Highly desirable: Experience migrating from DesignSync/Synchronicity, Cliosoft/SOS or other legacy data-management platforms.
• Highly desirable: Experience with large-scale Linux compute environments.
• Highly desirable: Experience developing CAD methodology and engineering automation.
• Highly desirable: Experience delivering technical training to engineering teams.

Conditions

Equal opportunity employer: decisions are made without regard to sex, race, religion, national origin, gender, gender identity or expression, age, sexual orientation, military or veteran status, or any other protected basis.

Benefits

• A competitive benefits package alongside salary. Details are provided during the hiring process.