Principal Deep Learning Communication Architect

Description

The company has built GPUs and computing platforms for graphics, PC gaming and accelerated computing for over 25 years, and is now applying AI to define the next phase of computing, where GPUs power computers, robots and self-driving cars that can understand the world.

The team is looking for a principal architect to shape how communication libraries work across next-generation platforms.

Responsibilities

• Define the long-term technical roadmap for communication libraries on next-generation platforms, ensuring models scale to clusters with hundreds of thousands of nodes.
• Lead the design of new communication primitives and collective algorithms, optimizing them for heterogeneous interconnects including NVLink, Spectrum-X (Ethernet) and Quantum-X (InfiniBand).
• Work with application developers to design and build specialized communication primitives, so that AI and HPC libraries such as NCCL, NIXL, NVSHMEM, UCC and UCX meet the needs of trillion-parameter and Agentic AI workloads.
• Work with silicon architects and software engineers to shape hardware specifications for next-generation networking so they meet the demands of trillion-parameter LLMs and Agentic AI.
• Build high-fidelity analytical models and simulators that predict system behavior under emerging workloads.

Requirements

• A PhD or M.S. in Computer Science, Electrical Engineering or a related field, or equivalent experience, plus 12+ years of industry experience in high-performance computing (HPC) or distributed deep learning.
• Deep understanding of 3D parallelism (data, tensor and pipeline) and advanced approaches such as context parallelism, expert parallelism and Zero Redundancy Optimizer (ZeRO) variants.
• Deep proficiency with NCCL, UCX, UCC, NVSHMEM or MPI, and required experience with RDMA, RoCE and low-level InfiniBand verbs.
• Advanced knowledge of high-throughput inference engines and schedulers, specifically TensorRT-LLM, vLLM, SGLang and the company Dynamo.
• Expert knowledge of the company GPU memory hierarchy (HBM3e/HBM4, L2 cache) and the CUDA programming model.
• Nice to have: hands-on experience developing within Megatron-Core, DeepSpeed or JAX/XLA, and an understanding of how these frameworks interact with low-level communication runtimes.
• Nice to have: significant upstream contributions to major open-source projects such as PyTorch Distributed, KServe or Ray.
• Nice to have: a proven record of deploying and optimizing models on the company platforms or similar rack-scale systems.
• Nice to have: a strong portfolio of patents or papers in top-tier systems and architecture venues such as ISCA, ASPLOS, NeurIPS or SC.

Conditions

Base salary depends on location, experience and other objective job-related factors, with an expected range of 272,000 USD to 431,250 USD.

Applications are accepted at least until November 3, 2026.

This is an existing vacancy.

The company uses AI tools in its recruiting process.

The company is an equal opportunity employer and does not discriminate on the basis of any characteristic protected by law.

Benefits

• Competitive salary and a generous benefits package.