You and the process

With a person
Anna, in-house recruiter
9 years hiring engineers
30 minutes with a real recruiter
They read your CV with you, on a call, and say where the offers are being lost.
Didn’t find what you were looking for? Tell us what to build
STR

Lead Firmware Engineer

  • Office
  • 6+ years

Salary

$173,000 - 238,000/ year

AI summary

For members

The whole posting in a few lines. Sign up to read it here and on every role you open.

Sign Up to Read

Description

System Development Division (SDD) is focused on delivering National Defense capabilities by driving mission-focused strategies to develop advanced technology systems enabling enduring products and solutions focused on achieving the customer vision. Our programs deliver sustainable, reliable, and cost-efficient capabilities focused on end-customer needs that function in operationally relevant environments and timeframes. SDD considers the entire lifecycle of the solution, from conceptualization and architecting, through development to deployment, while leveraging novel technologies to deliver first-of-a-kind systems.

SDD is seeking a Lead Firmware Engineer to implement complex system algorithms and interfaces in FPGAs for Radar and EW systems. Applicable projects span all levels of maturity from initial concept generation through design, prototype, development, test, and transition to production. In this role, you will implement, test, and verify designs through simulation and lab test. These FPGA designs could include signal processing across very wide bands, high data rate interfaces, serial interfaces, and complex control logic.

Additionally, you will support the effort to evaluate current and future system capabilities, identify improved applications and techniques, and ultimately recommend solutions. This position requires skills in working with multidisciplinary teams, supporting development and test activities, as well as technical proficiency in relevant technologies. Strong interpersonal, communication, and technical skills are also required. Applicants are expected to be self-motivated, detail oriented and have a demonstrated ability to effectively communicate with all levels of management and individual contributors on the program team through strong written and verbal communication skills.

Responsibilities

  • Mapping system-level requirements and objectives to FPGA specifications
  • Validating designs with simulation and verification techniques before hardware integration
  • Participating in FPGA development process improvement
  • Supporting full life cycle of development and integration of FPGA firmware into hardware systems
  • Creating and maintaining design documentation and test plans
  • Delivering technical briefings to a range of internal and external stakeholders
  • Coordinating with program managers and technical leads to manage task schedules and budgets
  • Providing mentorship to more junior engineers to accelerate their technical and professional development
  • Building and maintaining high-performing and empowered technical teams

Requirements

  • This position requires the ability to obtain a Top Secret (TS) security clearance, for which U.S. citizenship is needed by U.S. Government
  • Bachelor’s degree and at least 7 years of applicable experience, a Master’s degree and at least 5 years of applicable experience, or PhD and at least 2 years of applicable experience. Equivalent experience will be considered.
  • Experience with FPGA and SoC design entry using Verilog or VHDL
  • Experience with design flow for Xilinx and/or Intel FPGAs
  • Experience with simulation tools such as ModelSim/Questa, VCS, or Incisive
  • Demonstrated desire to successfully pursue new challenges, improve and broaden technical skills, seek greater responsibilities, and increase individual value to the organization
  • Capable of effectively working in a team environment, often under tight deadlines
  • Nice to Haves:
  • Active Security Clearance at the Secret or Top Secret level
  • Proficient with Xilinx or Altera SoC platforms
  • Proficient with FPGA or ASIC RTL design entry
  • Strong background and experience with industry best practices and version control
  • Proficient with complex timing closure
  • Experience with Matlab, Python, or C/C++
  • Experience with interfacing to high speed DACs and ADCs
  • Experience with Digital Signal Processing
  • Understanding of RF Systems, specifically radar or EW

Conditions

Full-Time Salary Range: $173,000 - $238,000

The salary range listed is based on external market data. Final offers are based on factors, such as but not limited to, the candidate’s experience, education, training, key skills/critical skills, security clearances, and prevailing market and business conditions.

STR is a growing technology company with locations near Boston, MA, Arlington, VA, near Dayton, OH, Melbourne, FL, Carlsbad, CA, Atlanta, GA, and Denver, CO. We specialize in advanced research and development for defense, intelligence, and national security in: cyber; next generation sensors, radar, sonar, communications, and electronic warfare; and artificial intelligence algorithms and analytics to make sense of the complexity that is exploding around us.

STR is committed to creating a collaborative learning environment that supports deep technical understanding and recognizes the contributions and achievements of all team members. Our work is challenging, and we go home at night knowing that we pushed the envelope of technology and made the world safer.

STR is not just any company. Our people, culture, and attitude along with their unique set of skills, experiences, and perspectives put us on a trajectory to change the world. We can't do it alone, though - we need fellow trailblazers. If you are one, join our team and help to keep our society safe! Visit us at www.str.us for more info.

STR is an equal opportunity employer. We are fully dedicated to hiring the most qualified candidate regardless of race, color, religion, sex (including gender identity, sexual orientation and pregnancy), marital status, national origin, age, veteran status, disability, genetic information or any other characteristic protected by federal, state or local laws.

Pursuant to applicable federal law and regulations, positions at STR require employees to obtain national security clearances and satisfy the requirements for compliance with export control and other applicable laws.

Where you’d work

From the office

About the company

STR

Office in MA, United States

Also hiring in FL, United States, OH, United States, Arlington, United States and 4 more places

2 of their 52 open roles are remote

Your chances

Worth a look before you spend an evening tailoring a CV for it.

  • 21 checks run
  • 2 red flags

Still hiring?

14 checks

1 red flag

How crowded?

7 checks

1 red flag

Fits Me

How well does this role fit you?

Answer a few questions or drop your CV, and every role gets a fit score with the reasons, this one first.

  • Your field
  • Level
  • Stack
  • Work model
  • Salary floor
  • Must-haves
Details10 facts · Role, Location, Compensation, Employment
Tech stack
  • Python
  • C++
Seniority
Lead
Type
Full-time
Region
United States
Pay period
Annual
Show 5 more factsShow less

Role

Category
Development
Seniority
Lead
Experience
7+ years
Tech stack
  • Python
  • C++

Location

Work model
Office
Region
United States
Office
  • MA, United States

Compensation

Salary
$173,000 - 238,000 / year
Pay period
Annual

Employment

Type
Full-time

Something wrong with this vacancy?

Similar vacancies

Share this vacancy

What's wrong with it?

The employer never sees who reported.

Reason