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NXP Semiconductors

Edge & Physical AI SW Product Manager/Director

  • Office
  • 6+ years

Salary

Not stated

Similar roles pay $170K - 235K a year · our estimate

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Description

The company is building its NPU software product line, covering the compiler, tools, runtime, SDK and developer experience across the business units.

The role sets the software roadmap for this line and drives how it connects to the existing eIQ platform.

Responsibilities

  • Set and maintain the NPU software roadmap across the compiler pipeline, optimization tools for conversion, quantization and pruning, the runtime and execution engine, SDK and developer APIs, model optimization, the workflow and repository, and integration with the existing eIQ platform.
  • Build a scalable platform and toolkit for newer model types (CNNs, LLMs, ViTs, VLMs), with a long-term path to same-day support for new models.
  • Track which architectures and operators are supported, set customer expectations to match, and work with engineering to close gaps.
  • Work with go-to-market teams to choose target verticals, segments and use cases, and build an enablement plan for every business unit.
  • Support pre-sales and sales with system-level solutions.
  • Define a unified compiler strategy that moves all AI products onto one workflow across business units.
  • Follow AI market developments in compilers, operators, frameworks, models, microservices, skills and agents, and shape the company's AI strategy from them.
  • Lead the eIQ integration of current and next-generation Neutron compiler and SDK, define NPU support for the existing MPU and MCU developers, and plan each feature and component from start to end of life.
  • Drive use-case-based software enablement, reprioritizing and reconciling existing features into one coherent user experience.
  • Set the open-source compiler strategy and contribution roadmap for Apache TVM, MLIR/LLVM, ONNX Runtime and the PyTorch and TensorFlow export paths.
  • Build and maintain a model zoo or equivalent: curate, compile, quantize and benchmark frontier models on Ara NPU and publish validated results.
  • Own the developer experience from SDK installation through import, compilation, profiling, debugging and deployment, and define and track adoption funnel metrics.
  • Manage relationships with framework and ISV partners such as PyTorch, TensorFlow, Hugging Face, ONNX Runtime and key vertical AI software vendors, pushing NPU support contributions and co-marketing. Support external integrations and licensing deals.
  • Run beta and early-access programs with strategic developer customers and turn their feedback into prioritized engineering requirements.
  • Define the versioning policy, backward compatibility commitments and long-term support release strategy.
  • Benchmark model coverage against Qualcomm AI Hub, DeepX, Axelera Metis SDK and Arm NN/ExecuTorch, keeping the software easy to use.
  • Keep working knowledge of firmware and PCIe and USB drivers.
  • Build end-to-end system software and demo platforms for hardware and software developers at industry events and conferences.

Requirements

  • At least 8 years of AI product management in software, developer tools or AI/ML infrastructure, including direct ownership of a software roadmap and a developer-facing API.
  • Solid grasp of the inference deployment pipeline: training frameworks (PyTorch, TensorFlow), exchange formats (ONNX, TFLite) and inference runtimes.
  • Working knowledge of compiler concepts such as graph optimization, operator fusion, quantization and code generation, enough to write clear requirements and weigh engineering trade-offs.
  • Experience defining and tracking developer adoption metrics such as SDK downloads, model compilations, active deployments and support ticket trends.
  • Track record in open-source or partner ecosystem work, such as upstream contributions, ISV enablement or developer community programs.
  • Strong prioritization, with experience running a large backlog across several engineering teams with competing priorities.
  • Clear technical writing, able to produce a developer API specification and an executive strategy memo in the same week.
  • Nice to have: direct experience with MLIR, TVM, ONNX Runtime or other open-source ML compiler frameworks.
  • Nice to have: hands-on work with INT8, INT4 and FP16 quantization, calibration and accuracy validation.
  • Nice to have: background in NPU, GPU or inference accelerator software such as Qualcomm SNPE/QNN, Hailo Dataflow Compiler, TensorRT, Core ML or similar.
  • Nice to have: experience dispatching workloads across CPU, GPU and dedicated accelerators.
  • Nice to have: familiarity with embedded Linux, Android or RTOS environments for edge deployment.
  • Plus: knowledge of automotive standards such as AUTOSAR and ASPICE, plus functional safety and security, for MCU and MPU alignment.
  • Plus: an MBA or advanced degree in computer science, electrical engineering or a related field.

Conditions

Based in the United States, with the employer's standard equal-opportunity statement applying to all candidates.

Where you’d work

From the office

About the company

NXP Semiconductors

Offices in Austin, United States, San Jose, United States, United States

Also hiring in Austria, Bucharest, Romania, Romania and 15 more places

2 of their 59 open roles are remote

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Details11 facts · Role, Location, Compensation, Employment
Tech stack
  • LLMs
Seniority
Director
Type
Full-time
Specialty
Product Manager
Region
United States
Pay period
Annual
Show 5 more factsShow less

Role

Category
Product & Project
Specialty
Product Manager
Seniority
Director
Experience
8+ years
Tech stack
  • LLMs

Location

Work model
Office
Region
United States
Offices
  • Austin, United States
  • San Jose, United States
  • United States

Compensation

Salary
Salary by agreement
Pay period
Annual

Employment

Type
Full-time

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